Totem is Apache’s full-chip, layout-based power and noise platform for analog and mixed-signal designs. It addresses the challenges associated with global couplings of power / ground noise, substrate noise, and package / PCB capacitive and inductive noise for memory components (Flash and DRAM), high-speed I/Os (HDMI and DDR), and analog circuits (power management ICs). Totem considers the impact of full-chip SoC substrate noise (CSE) by directly interfacing with RedHawk™ to obtain an accurate substrate injection signature for all digital components. Totem accurately analyzes noise coupling effects for every time-point using a single-kernel solver, allowing designers to account for global noise impact on their design.

Integrated with an existing analog design environment, Totem provides cross-probing of analysis results with industry-standard circuit design tools. It also enables designers to create a protected model representing the accurate power profile of the IP for mixed-signal design verification. Designers can use Totem for early-stage prototyping to guide their power network and package design, as well as for accurate chip sign-off.

A transistor-level power noise analysis and verification solution for static and dynamic power integrity from early design stage to sign-off.

The only commercially available solution for modeling and simulating substrate-based noise coupling at the full-chip level.

The industry's first comprehensive electro-static discharge (ESD) integrity solution.

A proven device-level, RLC parasitic extraction for custom designs.