EMI

 

On airplanes, we are reminded to disable all cell phones and other electronics for the fear they may interfere with the on-board electronics.  In early 2010, automotive electronics has been a suspected source of “unintended acceleration” in some automobiles, thereby bringing additional focus to the subject of Electromagnetic Interference.

Electronic devices sold in the United States must meet FCC Part 15 standards while those sold in Europe must meet CISPR standards.  FCC part 15 states that any digital device which uses timing pulses (e.g. clocks) in excess of 9kHz, must not unintentionally emit radiation over certain limits at a specified distance.  Also the device must comply over a broad range of frequencies including those above the fastest clock in the device (up to the 5th harmonic of the fastest clock but less than 40 GHz). For example, a cell phone with a 1.2 GHz processor must meet FCC Class B limits up to 6 GHz.   Unlike other failures which may be recoverable, failure to meet the mandatory standards mean the device cannot be sold in the respective markets.

The challenges of EMI lie in the fact that while the chip designer has little knowledge of how the chip will emit noise, it is the chip that is the source of the noise. Traditionally the system designer has been responsible for preventing and debugging EMI issues. However system testing happens late in the design cycle and where EMI failures can be very costly. One of the reasons for late stage validation is the lack of good noise model and analysis solution at both the chip and system level. The following solutions are designed to address EMI issues at both the chip and package/system level:

  • Chip Power Model (CPM™):  A die model that represents chip as a noise generator and source of Electromagnetic Radiation.
  • Sentinel-PSI: Utilizes CPM to perform 3-D Full wave Electromagnetic simulation and identifies EMI issues at a package and system level.
  • RedHawk: Performs full-chip dynamic simulation which enables creation of the CPM and provides tools for designers to pinpoint and understand the origins of EMI noise within the chip.

EMI Methodology

The momentary shorting of both NMOS and PMOS devices during a state transition in CMOS logic leads to large currents flowing in the chip. As device scaling is aggressively pursued, edge rates and switching times become faster and faster generating additional higher frequency noise components.  Low power design techniques introduced to reduce standby or dynamic power can also introduce additional EMI noise during low activity to high activity transition. 

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Chip Power Model

CPM can model the chip during any mode of operation. It includes the active switching currents in the chip, the inductive and capacitive elements which can result in more coupling paths for noise, and the capacitive elements which can help suppress EMI noise. The switching currents are the source of noise energy at different frequencies.  Faster edge rates results in more energy at higher frequencies. CPM can be generated early in the chip design process to assist the system designer in preventing EMI issues.

Figure1: The Chip Power Model captures the active and parasitic components in the chip to enable accurate EMI analysis

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Early System-level EMI Analysis

While the chip is the noise source, the package and board form the path for energy to radiate outwards. Unintentional antennas in the system act to radiate the noise from the chip outwards. Therefore it is also imperative to analyze EMI at a system level. Sentinel-PSI provides full wave true 3D electromagnetic solver to analyze the EMI effects. It includes package, board, and CPM to perform a full simulation to generate near and far field radiation patterns. This helps the system designer identify locations of possible EMI radiation early in the design process.

Figure 2: EMI analysis flow using RedHawk, CPM, and Sentinel-PSI

 

Figure 3: EMI simulation with CPM versus measured EMI noise

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On-chip EMI Debug

Historically, the chip designer has never been concerned about EMI issues as it is left to the domain of the system designer. However it is more effective to identify early in the design flow if there will be EMI issues and address those issues immediately at both the chip and the system level. If EMI simulation using Sentinel-PSI shows excessive radiation, then the designer can uncover which functional block in the chip is causing the EMI noise and introduce techniques such as on-chip decoupling capacitors insertion to filter out the noise.  RedHawk allows the designer to perform dynamic EMI analysis to pinpoint the root cause of the EMI noise. After a full-chip dynamic simulation, RedHawk performs noise spectrum analysis of each region in a design. The noise map at different frequencies can be generated and the noise spectrum at any region can be analyzed. Decoupling capacitors can be inserted using ‘what-if’ analysis and after performing a dynamic simulation, the noise can be displayed to see the effectiveness of the inserted capacitors.

Figure 4: Noise map from RedHawk at different frequencies; The noise spectrum of the noisiest region on the chip.

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