Apache Addresses Dynamic Power Integrity in STARC’s Latest Production Flow

Apache’s Dynamic Power Closure Solution Provides Accuracy and Feedback to Timing

Mountain View, Calif. – January 23, 2006 – Apache Design Solutions, the technology leader in physical design integrity solutions for system-on-chip (SoC) designs, today announced that the Semiconductor Technology Academic Research Center (STARC) in Japan has implemented RedHawk, Apache’s full-chip dynamic power closure solutions in their latest production flow, STARCAD-21. During an extensive evaluation, RedHawk demonstrated accurate correlation results with Spice for both static IR-drop and dynamic voltage drop analysis. In addition, STARC has established a methodology for providing feedback to timing based on RedHawk’s power noise waveforms.

“As our customers go deeper into the nanometer realm, we need to support a power closure flow with a high degree of accuracy, fast turnaround time, and reduced design margins,” said Nobuyuki Nishiguchi, Vice President, General Manager Development Dept.-1 of STARC. “Apache’s RedHawk has proven to be the solution with accurate power results which we can use to provide feedback to timing for tighter design margin. It also delivers the capacity, performance and ease-of-use that is needed for large designs.”

“Over the past year, Apache and STARC have worked closely to deliver a power closure methodology for leading semiconductor companies in Japan,” said Andrew Yang, CEO of Apache. “We are pleased to see the addition of RedHawk in the STARC-21 production flow, and to be able to provide customers with access to the most accurate dynamic power integrity solution for ensured silicon success.”

Apache Design Solutions, NSPICE, RedHawk, PsiWinder, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.