Apache's Power Closure Solution Leveraged by P.A. Semi for its 65nm Low-Power Processor Design

MOUNTAIN VIEW, Calif. – September 21, 2006 - Apache Design Solutions, the technology leader in full-chip dynamic power and noise solutions for system-on-chip (SoC) designs, today announced that P.A. Semi, a fabless semiconductor company delivering the industry-leading performance-per-watt PWRficient™ processor family, used Apache’s RedHawk power closure solution for the design of its low-power processor on the 65nm process. P.A. Semi used RedHawk during its design process to identify physical design issues and to verify the integrity of its power grid design.

“Power delivery is a fundamental design consideration for our-next generation processor. Apache delivers the enabling technology to improve the integrity of our power grid,” said Sribalan Santhanam, vice president of engineering, Design Group, P.A. Semi. “We are impressed with the robustness of Apache’s solution, as well as the responsiveness of its support and R&D staff.”

“Over the past few months, we have seen a steady increase in 65nm design starts and we are pleased to be part of the solution that is enabling low power leaders such as P.A. Semi to meet the power/performance metrics with confidence,” said Dian Yang, vice president of product management at Apache. “The rapid adoption of Apache’s power integrity solution demonstrates the market’s need for a full-chip dynamic power solution that delivers accuracy, performance, and productivity.”

Apache Design Solutions, NSPICE, RedHawk, PsiWinder, Sahara-PTE, and Vectorless Dynamic are trademarks of Apache Design Solutions, Inc.