Design Automation Conference 2010

Date: Monday, June 14, 2010 - Friday, June 18, 2010
Location: Anaheim Convention Center

Visit Apache Design Solutions at DAC 2010, Booth #535

Power, noise, and reliability are major design concerns today that require proven solutions to ensure that your design functions properly, meets the power and performance requirements, and can be produced at the lowest possible cost. Apache is the leading supplier of power, noise, and reliability solutions from RTL to Silicon, Analog to Digital, and Chip to Package / System.

Leading semiconductor companies such as LSI, MoSys, STMicroelectronics, Texas Instruments, and TSMC will share their best practices for addressing RTL power reduction, power integrity sign-off, EM/ESD validations, and chip-package-system co-design/co-analysis. Attend one or more of their presentations to learn how these leading companies are addressing the critical power and noise challenges and the results they obtained by using Apache's products.

A Design for Power Methodology: The LSI Experience
Ruggero Castagnetti, LSI

    June 14 @ 15:00 <Register>

A Foundry's View of Power Integrity Closure for 3DIC, 28nm, and More
Willy Chen, TSMC

    June 14 @ 14:00 <Register>

Use of Advanced VectorLess Options for Power Integrity Validation in TI High Performance Designs
Asif Mahbub, Texas Instruments

    June 16 @ 13:00 <Register>

Power and Thermal Variation Aware Design Methodology and Challenges
Fumihiro Minami, STARC

    June 15 @ 14:00 <Register>

Reliability Validation Challenges and Solutions for the Sub-32nm Era
Remy Chevallier, STMicroelectronics

    June 14 @ 11:00 <Register>

Analysis and Mitigation of ESD Induced Failures for Advanced IP Designs
Richard Rouse, MoSys

    June 15 @ 13:00 <Register>

DDR Based I/O Interface Design and Verification Techniques
Dr. Souvik Mukherjee, Texas Instruments

    June 15 @ 11:00 <Register>

Package and PCB Model Extraction using a 3D Full-wave Technology with Correlation to Measurements

    June 16 @ 14:00 <Register>

For detailed description of customer presentations, click here.

back to top

Tutorials, Presentations, and Demos

RTL Power Analysis and Reduction:

Design RTL for Low Power

    June 16 @ 12:00 <Register>


    June 14 @ 11:00 <Register>
    June 15 @ 17:00 <Register>
    June 16 @ 10:00 <Register>

Power Integrity and Signoff for SoC, AMS, and 3DIC Designs:

Power Grid Prototyping and Design Exploration

    June 16 @ 16:00 <Register>

Power Integrity Analysis and Debug with RedHawk Explorer

    June 14 @ 12:00 <Register>

3DIC / TSV Power and Noise

    June 15 @ 12:00 <Register>


    June 14 @ 10:00 <Register>
    June 15 @ 15:00 <Register>
    June 16 @ 14:00 <Register>


    June 14 @ 12:00 <Register>
    June 15 @ 11:00 <Register>
    June 16 @ 17:00 <Register>

Advanced Reliability Solutions for EM, ESD:

Reliability Analysis and Debug for EM and ESD

    June 15 @ 14:00 <Register>


    June 14 @ 13:00 <Register>
    June 15 @ 16:00 <Register>
    June 16 @ 13:00 <Register>

Chip-Package-System Co-design/Co-analysis:

Sentinel-SSO, CPM

    June 14 @ 16:00 <Register>
    June 15 @   9:00 <Register>
    June 16 @ 15:00 <Register>

Sentinel-NPE, Sentinel-PSI

    June 14 @ 17:00 <Register>
    June 15 @ 12:00 <Register>
    June 16 @   9:00 <Register>

back to top

For detailed description of product presentations, click here.

For calendar view of all the presentations, click here.

Speakers, Panels, and User Tracks

Apache speakers and customers will be presenting in forums, panels, and user tracks.  <MORE>

Partnership with TSMC

Apache and TSMC collaboration is delivering proven flows and methodologies for our mutual customers.  <MORE>