- PowerArtistRTL Power Reduction, Analysis, Debug, and RPM Generation
- RedHawkSoC Dynamic Power, Advanced Low Power, Reliability, and Chip-Package Co-design
- TotemAnalog/Mixed-Signal Dynamic Power, Substrate Noise, EM, and ESD
- SentinelChip-Package-System Power/Signal Integrity, IO-SSO, Thermal, and EMI
- ResourcesTechnical Papers and Presentations, Contributed Articles and Conference Papers, Webinars and Videos
Apache’s Sentinel is a complete Chip-Package-System (CPS) co-design / co-analysis solution addressing system-level power integrity, I/O-SSO, thermal, and EMI challenges. It combines the chip’s core switching power delivery network (PDN), I/O sub-system, and IC package / PCB models and analysis in a single environment for accurate CPS convergence from early stage prototyping to sign-off.
At Sentinel’s core is the Chip Power Model (CPM™), a compact Spice-compatible model of the full-chip PDN. During early stage prototyping, the CPM enables designers to optimize package layers, power pads, and decaps; resulting in cost effective package designs. With CPM, designers gain a higher degree of confidence in their package sign-off by considering the impact of chip’s PDN on their package designs. Sentinel provides the ability to manage power delivery integrity and power-induced noise for the entire electronic system.