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The transfer of metal ions over time from electro-migration (EM) can lead to either narrowing or bumps in the wires. Narrowing of the wire can result in degradation of performance, or in extreme cases can result in the complete opening of the conduction path. Widening and bumps in the wire can result in shorts to neighboring wires, especially if they are routed at the minimum pitch in the more advanced technologies.
Foundries typically specify the maximum amount of current that can flow through a wire under varying conditions. These EM limits depend on several design parameters, such as wire topologies, widths, and metal densities. EM degradation and EM limits depend significantly on the temperature at which interconnects operate, the material properties of the wires and vias, the direction of current flow in the wire, and on the distance of the wire segment from the driver(s).
One common EM check employed is to measure the average or DC current density flowing through the wire and compare it against foundry-specified limits. The impact of average or DC current in the wires is typically quantified using Black's equation. It measures and compares the Mean-Time-To-Failure (MTTF) for interconnects with different parameters, such as the average current density, temperature, and activation energy. Another common check employed is to measure the peak and RMS current flowing through interconnects and check them against foundry-specified targets. These checks ensure that metal failures do not occur because of Joule- or self-heating in the wires.
RedHawk-SEM is a full-chip signal electro-migration solution. It supports TSMC’s 65/45/28nm EM rules and provides an accurate and detailed average, RMS, and peak EM violation reports for signal net EM analysis. It performs analysis at the gate-level by verifying the EM on signal lines between cells, as well as on the output of each driver cells. RedHawk-SEM eliminates excessive false violation results, thus enabling designers to focus on resolving real violations in their design. It’s intuitive, easy-to-use interface along with fast run times enable quick time-to-results and ease-of-results interpretation.
- Complete signal EM analysis coverage including inter-cell wire, via, and pad currents at the SoC level
- Provides both static analysis for long-term (MTTF) failure and dynamic simulation for Joule-heating caused failure checks
- Support the latest 65/45/28nm EM rules including length/width, temperature, and current direction dependent parameters.
- Large capacity and fast run times for full-chip designs support
- A single run for Avg, RMS and Peak EM analysis including consideration for uni-directional and bi-directional current flows
- Fast hierarchical EM analysis for full-chip level support
- Advanced EM rule support such as:
- Length and width dependent EM equations
- Temperature dependent EM scaling
- Current direction dependent EM for vias
- GUI layout and cross probe capability for analyzing violations
Unified Avg., RMS, and Peak EM Analysis
In a single run, RedHawk-SEM estimates Iavg, Irms, and Ipeak for every wire in the design, especially those belonging to the clock tree network, and compares them against their respective EM limits. RedHawk-SEM flow estimates different current values based on cell design parameters and analyzes the EM for all wires between the cells in a design.
Iavg, Irms, and Ipeak are all derived using the current profile during the charging or discharging process of any output net. By default, RedHawk-SEM approximates the switching current profile at the output of a cell using a polynomial-based profile. The shape and size of the profile depend on the average current of the net and the transition times of the rising or the falling edge. Alternatively, SPICE-accurate current profile can be generated from Apache’s Power Library (APL) characterization for various design conditions.
RedHawk-SEM estimates the average current flowing in every wire (Iavg) from the capacitive load seen at the output of each cell, its operating frequency, its supply voltage, and toggle rate - which is defined as 200% for clock pins. Typically the current flowing in a signal net is bi-directional and the true average current is very small. Therefore RedHawk-SEM calculates the rectified average current.
The Root-Mean-Square (RMS) current (Irms) causes Joule heating, which can result in thermally induced EM failures. RedHawk-SEM calculates the Irms current using the following equation and compares it to the defined limits.
For peak current (Ipeak) EM analysis, RedHawk-SEM uses either the calculated or user-provided polynomial-based waveforms to determine whether the given net is within the design limits.
Fast Hierarchical Analysis
RedHawk-SEM’s hierarchical analysis provides run-time performance and memory reduction. In the hierarchical mode, RedHawk-SEM analyzes the top level nets and the interface nets, which are the nets that connect standard cells to primary I/Os in the design DEF. In addition, the designer can perform mixed-level analysis by defining a list of blocks for which the internal nets are considered. In a mixed-level mode, RedHawk-SEM delivers detailed analysis of the top level and interface nets along with specified blocks while maintaining the performance advantage.
Figure 1: Signal EM analysis at the full-chip level (flat vs. top level with interface nets)
Advanced EM Rules Support
The EM rules have become much more stringent for 65/45/28nm technology nodes requiring support for more advanced EM rules. RedHawk-SEM supports the following rules needed for the latest designs
- Length and width dependent limits for metals
- Upper and lower metal layer size dependent limits for vias
- Temperature dependent limits for metal and vias
- Multiple vias with varying cut on the same layer
- Dual rectangular via and slot via
- 2nd order width table lookup considering OPC effects
- N28 iRCX file from TSMC
GUI-based Violation Analysis
RedHawk-SEM offers various textual reporting and GUI table/display for analyzing the results of EM verification, such as separate text reports for AVG, RMS, and PEAK EM analysis. RedHawk-SEM provides a list of EM violations ranked in order with the worst value at the top.
Figure 2: After unified analysis on AVG, RMS, and PEAK EM, list of worst EM table can be shown
Figure 3: After unified analysis on AVG, RMS, and PEAK EM, any subset of signal nets can be displayed
Figure 4.:After unified analysis on AVG, RMS, and PEAK EM, a single signal net can be displayed with detailed current and its direction information in the log window.
A designer can view all or a subset of signal nets, as well as a detailed view of a single signal net including current direction information. With RedHawk-SEM, designers can debug the signal EM issues by cross probing on current value, its direction, and signal net geometries.