- Products
- PowerArtistRTL Power Reduction, Analysis, Debug, and RPM Generation
- RedHawkSoC Dynamic Power, Advanced Low Power, Reliability, and Chip-Package Co-design
- TotemAnalog/Mixed-Signal Dynamic Power, Substrate Noise, EM, and ESD
- SentinelChip-Package-System Power/Signal Integrity, IO-SSO, Thermal, and EMI
- ResourcesTechnical Papers and Presentations, Contributed Articles and Conference Papers, Webinars and Videos
- Flows
- Ultra Low PowerPower methodology for ultra-low-power designs
- IP IntegrationPower methodology for IP Integration initiative
- Chip-Package-SystemPower methodology for giga-hertz performance
- Support
- Community
- CustomersServing the industry’s leading electronics companies
- PartnersFoundry, IP, EDA, Industry Alliances
- Blog
- Chip-Package-System User GroupConvergence for Power, Noise, and Reliability
- Company
- About ApacheOverview, Milestones, Achievements
- News
- Events
- Employment
- Global Offices
News
Apache to Exhibit at ARM TechCon 2011 Chip Design Day Expo
Showcasing Design Methodologies, Tools and Technologies for ARM Architecture
PITTSBURGH – October 20, 2011 – Apache Design, Inc., a subsidiary of ANSYS (NASDAQ: ANSS), today announced it will be participating at the ARM Technology Conference (TechCon) 2011 during the Chip Design Day Expo (booth #27), being held at the Santa Clara Convention Center on October 25, in Santa Clara, California.
As part of ARM’s Connected Community ecosystem, customers use Apache’s RedHawk and PowerArtist to help design, analyze and validate ARM processor cores and IP. Physical IP design teams working on advanced memory and I/O designs use Totem to simulate and analyze designs for power, noise and reliability to ensure robust designs for advanced technology nodes. To validate ARM designs for electrostatic discharge (ESD) robustness, customers use Apache’s PathFinder.