- Products
- PowerArtistRTL Power Reduction, Analysis, Debug, and RPM Generation
- RedHawkSoC Dynamic Power, Advanced Low Power, Reliability, and Chip-Package Co-design
- TotemAnalog/Mixed-Signal Dynamic Power, Substrate Noise, EM, and ESD
- SentinelChip-Package-System Power/Signal Integrity, IO-SSO, Thermal, and EMI
- ResourcesTechnical Papers and Presentations, Contributed Articles and Conference Papers, Webinars and Videos
- Flows
- Ultra Low PowerPower methodology for ultra-low-power designs
- IP IntegrationPower methodology for IP Integration initiative
- Chip-Package-SystemPower methodology for giga-hertz performance
- Support
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- CustomersServing the industry’s leading electronics companies
- PartnersFoundry, IP, EDA, Industry Alliances
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Events
Design Automation Conference 2013
Date:
Sunday, June 3, 2012 - Thursday, June 7, 2012
Location: Moscone Center, San Francisco, CA
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DAC 2013 Activities Booth #1346 |
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ANSYS subsidiary, Apache Design delivers comprehensive simulation platform for electronic systems design, with emphasis on solutions for power analysis, optimization, and sign-off.
Join us in Austin for exclusive presentations by top semiconductor companies such as AMD, ARM, Freescale, GlobalFoundries, LSI, Nvidia, Samsung and STMicroelectronics to learn how they use ANSYS-Apache’s simulation software to deliver ultra-low-power, high-performance, reliable and cost optimized designs for mobile, custom analog, and automotive applications.
Meet our Power Team Experts for in-depth presentations and demos on the industry’s leading power solutions from RTL to silicon, across chip, package, and system.
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Customer Experience Sharing Designers from AMD, ARM, Freescale, GlobalFoundries, LSI, Nvidia, Samsung, and STMircoelectronics will share their best practices and how our power noise solutions enabled them to meet power, performance, reliability, and cost targets. |
ANSYS-Apache Power Solutions Our Power Team Experts will present production-proven power noise methodologies for IC designs used in mobile, high-performance computing, custom analog and automotive applications, as well as in-depth talks on all of our simulation solutions for electronics design. |
Follow us on Twitter @ANSYS_Apache for special announcements throughout the show (@50thDAC, #50DAC)
ANSYS-Apache Activities @ DAC
DAC Technical Panel
Tuesday, June 4, 2013
1:30 PM — 2:30 PM
Room 16AB
I Blew My Power Budget: Whom Should I Throw Under the Bus?
Moderator: John Donovan, Low-PowerDesign.com
Speakers:
- Clive Bittlestone - Texas Instruments
- Rick Hofmann – Qualcomm
- Anis Jarrar – Freescale Semiconductor
- Arvind Shanmugavel – ANSYS subsidiary, Apache Design
ARM Connected Community Pavilion
Apache's Power Team Experts will be featured in the ARM Connected Community Pavilion booth #921. Find out how Apache and ARM are joining forces to address low-power design challenges for our mutual customers.
TSMC Open Innovation Partner Theater
Apache's Power Team Experts will be featured in the TSMC partner booth #1746. Attend our presentation to learn how Apache and TSMC are partnering to deliver power noise solutions for 16nm and CoWas sign-off flows.
DAC Designer Track
Don’t miss presentations by ANSYS-Apache customers in the popular DAC Designer Track, sharing their latest tips and tricks for RTL power analysis and reduction, IP validation and integration, advanced process design reliability verification, and chip-package-system optimization. These sessions are open to all attendees.