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Events
Impact of Multiple Advanced Vectorless Simulation Techniques for In-Design Analysis and Signoff
Date:
Wednesday, June 16, 2010 - 1:00pm - 2:00pm PDT
Location: Booth #535
Presenter: Asif Mahbub, Texas Instruments
Lack of data from logic simulation (VCD) to perform dynamic power noise analysis is a known and vexing problem. This presentation will discuss advanced techniques used by TI in their high performance designs for creating sets of realistic switching scenarios for performing IP and full-chip level dynamic power integrity analysis, allowing for chip layout and package issue identification and fixes early in the design process.