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Sentinel-TI

The trend toward more and more device integration has increased IC functionality and speed. In the Stacked-die design heat dissipation and the thermal characteristics of the package play a significant role in chip reliability. More and more the critical factor in determining IC reliability is not the IC itself, but the package. At the system level, reliability depends on matching the thermal expansion properties of the die, interconnects, package and PCB to avoid thermal differential expansion due to internal or external temperature changes.

Sentinel-TI (Thermal and mechanical Integrity) provides unparalleled accuracy and ease-of-use for analyzing the effects of hygro, thermal and mechanical stresses on a variety of both custom and industry-standard package styles.

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Input Data Requirement

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Simulation Flow

In order to simulate the effects of thermal and structural stresses on a particular IC package there must be a detailed finite element model of the package with all package parameters. To begin an analysis, the model must then be configured according to the design information. The corresponding loading conditions, including power, ambient temperatures, etc. must also be specified. Once this is accomplished, the model can be solved using the accurate and efficient numerical solver. The results of the analysis (including temperature distribution) can then be manipulated to graphically highlight package behavior under the specified analysis conditions. The simulation results are also available in the form of a detailed text file report. 

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Package Modeling

Sentinel-TI allows design engineers to quickly and easily construct complex, finite element simulation models for various types of electronic package designs. Convenient built-in parametric modeling is available for standard JEDEC packages. With the user-friendly GUI, to define the physical package, all you need to input are the package dimensions and preferred material properties. The material properties can also be obtained from the extensive library embedded within Sentinel-TI. To ensure correct data entry, all parameters to be specified for each data entry screen are illustrated on the screen so that the meaning of the parameter is never in question.

The extensive internal database of semiconductor packages covers both leadframe and BGA types of package designs. In addition, the Direct Cad Interface (DCI) to Cadence MCM/SIP files and Gerber files can be used to construct non-standard package models and create detailed metal traces in the substrate/PCB. Supported package types include: Ball Grid Array (BGA), Quad Flat Package (QFP), Dual Inline Package (DIP), Small (or Short) Outline (SO), Plastic Leaded Chip Carrier (PLCC), Chip Scale Package (CSP), Flip Chip Package, and Quad Flat No Leaded Package (QFN).

Thermal Resistance

The temperature at which a package operates determines the service life of a device since excessively high temperatures degrades the chemical and structural integrity of various materials used in the packaging. Sentinel-TI can be easily set up to run various temperature related analysis for both single chip and multi-chip modules including Theta-ja, Theta-jb and Theta-jc analysis at different air speeds and power dissipation calculations for the package top, sides and PCB. Heat transfer coefficients assigned to external surfaces are based on experimental results. This produces more practical boundary conditions in the analysis than simulated ones. Detailed package modeling, including metal trace and via considerations, results in a more accurate prediction of thermal responses.

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Popcorning

Most IC plastic package components and organic molding compounds are not totally impermeable to water vapor. At room temperature, epoxy-molding compounds absorb moisture up to approximately 0.5% of their weight when exposed to high relative humidity. During the manufacturing process when the package is heated up quickly during the re-flow soldering operation, the absorbed moisture can evaporate at an explosive rate and thus crack the encapsulation material. This damage is commonly referred to as the popcorn effect. Sentinel-TI is able to evaluate and analyze the effects of the moisture content in the Epoxy or Encapsulated Molding Compound (EMC) and material interfaces, for potential delamination and crack propagation and the popcorning of the EMC.  

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Interface Delamination

At each interface of a package, moisture can hydrolyze the epoxy, which in turn degrades the interfacial chemical bonds and produces internal stresses. In general, delamination results from the internal stresses generated in the solder re-flow procedure during the assembly of plastic encapsulated devices on circuit boards. Therefore, delamination may occur between the molding compound and the lead-frame, or between the compound and the die surface. Sentinel-TI can be used to analyze and predict the saturation moisture level in the molding compound and at each interface, as well as the overall moisture content inside the package. Based on the re-flow temperature and pre-conditions, it can also determine the initial delamination length and the final propagation length along each interface. The delamination analysis is a subset of the popcorn analysis.

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Warpage

Trends in IC packaging are towards mounting larger dies on to smaller and thinner substrates. A typical example is the Thin Small Outline Package (TSOP). Since the package thickness is very small, internal stresses can cause external deformation, the so-called warpage phenomenon. Warpage changes the lead co-planarity that significantly influences the assembly process. Sentinel-TI provides a powerful set of tools that allows package designers to accurately estimate the warpage deformation in different parts of a package. The ultimate goal is to choose suitable materials and assembly processes to minimize warpage and the internal residual stresses.

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Die Cracking

The first step in package processing is bonding the die to a pad. During the curing process the maximum temperature typically reaches ~180C. Internal stresses are developed during the cycle due to the mismatch of thermal expansion coefficients of different components of the package. If the stress level exceeds the strength limit of the die, cracking occurs in the die. Because of its high-speed computational capability and extensive materials database, Sentinel-TI can accurately analyze and determine the onset and propagation of cracking within the die. It provides a useful tool for packaging engineers in determining and/or modifying the package design or process.

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Thermally Induced Stress

Sentinel-TI is a valuable tool for evaluating the thermally induced deformation and stress in the IC package due to die heating. In the analysis, the temperature distribution in the package is calculated by a thermal analysis. Then the temperature distribution in the package, with or without the PCB, is used as the loading for the deformation and stress analysis. Sentinel-TI automatically performs a coupled-field analysis (i.e. a thermal analysis followed by a structural analysis). The thermal results include Theta-ja; Psi-jt; and heat dissipation through the package top, side and PCB. The deformation result is the warpage of the package due to the thermally induced stress condition.

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Output Results

Sentinel-TI provides the following outputs from package / PCB thermal integrity analysis.

• Theta-ja, Theta-jb, Theta-jc, Psi-jt
• Delphi model
• Thermal stresses
• Die cracking prediction
• Delamination prediction 
• Popcorning level prediction
• Solder joint fatigue life prediction

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CAD Interfaces

Sentinel-TI supports Gerber, Cadence Allegro (.mcm, .sip), Encore BGA, Mentor Graphics MCM Station and Zuken CR-5000 package designs.

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