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TSMC Technology Symposium Japan
Pan Pacific Yokohama Bay Hotel Tokyu
Yokohama, Japan
10/20/08


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EPEP
Wyndham Hotel
San Jose, CA
10/27 - 10/28/08

17th Conference on Electrical Performance of Electronic Packaging

Monday, October 27, 1:40 - 3:20, California Ballroom H-M

Chip-Package Co-Design Methodology for Global Co-Simulation of Re-Distribution Layers (RDL)
     Sidina Wane........................... NXP-Semiconductors
     An-Yu Kuo........................... Apache Design Solutions


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SoC Conference
Radisson Hotel
Newport Beach, CA
11/05/08


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Chip-Package Co-Design: Applying Chip Power Model in System Power Integrity Analysis

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